bitkeeper revision 1.1159.216.1 (41ddad0e-Lfw2xcLDHNh31b3hdh-AA)

entry.S:
  Additional fix to critical section fixup code.

diff --git a/linux-2.6.10-xen-sparse/arch/xen/i386/kernel/entry.S b/linux-2.6.10-xen-sparse/arch/xen/i386/kernel/entry.S
index e344b1be7591bc134a13916a9d86e111db91c100..db26c6a44079936d89a0811d5a76fc23e73e7022 100644 (file)
--- a/linux-2.6.10-xen-sparse/arch/xen/i386/kernel/entry.S
+++ b/linux-2.6.10-xen-sparse/arch/xen/i386/kernel/entry.S
@@ -93,8 +93,9 @@ VM_MASK               = 0x00020000
 #define XEN_UNLOCK_VCPU_INFO_SMP(reg) preempt_enable(%ebp)
 #define XEN_UNLOCK_VCPU_INFO_SMP_fixup .byte 0xff,0xff,0xff
 #define Ux00 0xff
+#define XEN_LOCKED_BLOCK_EVENTS(reg)   movb $1,evtchn_upcall_mask(reg)
 #define XEN_BLOCK_EVENTS(reg)  XEN_LOCK_VCPU_INFO_SMP(reg)             ; \
-                               movb $1,evtchn_upcall_mask(reg)         ; \
+                               XEN_LOCKED_BLOCK_EVENTS(reg)            ; \
                                XEN_UNLOCK_VCPU_INFO_SMP(reg)
 #define XEN_UNBLOCK_EVENTS(reg)        XEN_LOCK_VCPU_INFO_SMP(reg)             ; \
                                movb $0,evtchn_upcall_mask(reg)         ; \
@@ -110,7 +111,8 @@ VM_MASK             = 0x00020000
 #define XEN_UNLOCK_VCPU_INFO_SMP(reg)
 #define XEN_UNLOCK_VCPU_INFO_SMP_fixup
 #define Ux00 0x00
-#define XEN_BLOCK_EVENTS(reg)  movb $1,evtchn_upcall_mask(reg)
+#define XEN_LOCKED_BLOCK_EVENTS(reg)   movb $1,evtchn_upcall_mask(reg)
+#define XEN_BLOCK_EVENTS(reg)  XEN_LOCKED_BLOCK_EVENTS(reg)
 #define XEN_UNBLOCK_EVENTS(reg)        movb $0,evtchn_upcall_mask(reg)
 #define XEN_SAVE_UPCALL_MASK(reg,tmp,off) \
        movb evtchn_upcall_mask(reg), tmp; \
@@ -510,7 +512,7 @@ scrit:      /**** START OF CRITICAL REGION ****/
        jnz  14f                        # process more events if necessary...
        XEN_UNLOCK_VCPU_INFO_SMP(%esi)
        RESTORE_ALL
-14:    XEN_BLOCK_EVENTS(%esi)
+14:    XEN_LOCKED_BLOCK_EVENTS(%esi)
        XEN_UNLOCK_VCPU_INFO_SMP(%esi)
        jmp  11b
 ecrit:  /**** END OF CRITICAL REGION ****/